A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS

Mohamed M. Elsayed, Mohammed M. Abdul-Latif, Edgar Sánchez-Sinencio. A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS. J. Solid-State Circuits, 48(9):2104-2117, 2013. [doi]

Abstract

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