A 2-V 3.7-mW delay locked-loop using recycling integrator correlators for a 5-Mcps DS-CDMA demodulator

Yoshihisa Fujimoto, Shuichi Kawama, Kunihiko Iizuka, Masayuki Miyamoto, Daniel Senderowicz. A 2-V 3.7-mW delay locked-loop using recycling integrator correlators for a 5-Mcps DS-CDMA demodulator. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 35-38, IEEE, 2000. [doi]

Abstract

Abstract is missing.