Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near/Sub-Threshold Logic Circuits

Hiroshi Fuketa, Masahiro Nomura, Makoto Takamiya, Takayasu Sakurai. Intermittent Resonant Clocking Enabling Power Reduction at Any Clock Frequency for Near/Sub-Threshold Logic Circuits. J. Solid-State Circuits, 49(2):536-544, 2014. [doi]

Authors

Hiroshi Fuketa

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Masahiro Nomura

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Makoto Takamiya

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Takayasu Sakurai

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