NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs

Debabrata Ghosh, S. K. Nandy, K. Parthasarathy, V. Visvanathan. NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs. In VLSI Design. pages 341-346, 1993.

@inproceedings{GhoshNPV93,
  title = {NPCPL: Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs},
  author = {Debabrata Ghosh and S. K. Nandy and K. Parthasarathy and V. Visvanathan},
  year = {1993},
  tags = {logic},
  researchr = {https://researchr.org/publication/GhoshNPV93},
  cites = {0},
  citedby = {0},
  pages = {341-346},
  booktitle = {VLSI Design},
}