Design of CMOS three-stage amplifiers for near-to-minimum settling-time

Gianluca Giustolisi, Gaetano Palumbo. Design of CMOS three-stage amplifiers for near-to-minimum settling-time. Microelectronics Journal, 107:104939, 2021. [doi]

@article{GiustolisiP21,
  title = {Design of CMOS three-stage amplifiers for near-to-minimum settling-time},
  author = {Gianluca Giustolisi and Gaetano Palumbo},
  year = {2021},
  doi = {10.1016/j.mejo.2020.104939},
  url = {https://doi.org/10.1016/j.mejo.2020.104939},
  researchr = {https://researchr.org/publication/GiustolisiP21},
  cites = {0},
  citedby = {0},
  journal = {Microelectronics Journal},
  volume = {107},
  pages = {104939},
}