A low-power area-efficient SRAM with enhanced read stability in 0.18-μm CMOS - researchr publication authors

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Cihun-Siyong Alex Gong, Ci-Tong Hong, Kai-Wen Yao, Muh-Tian Shiue. A low-power area-efficient SRAM with enhanced read stability in 0.18-μm CMOS. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008. pages 729-732, IEEE, 2008. [doi]

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