A low-power area-efficient SRAM with enhanced read stability in 0.18-μm CMOS

Cihun-Siyong Alex Gong, Ci-Tong Hong, Kai-Wen Yao, Muh-Tian Shiue. A low-power area-efficient SRAM with enhanced read stability in 0.18-μm CMOS. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008. pages 729-732, IEEE, 2008. [doi]

@inproceedings{GongHYS08,
  title = {A low-power area-efficient SRAM with enhanced read stability in 0.18-μm CMOS},
  author = {Cihun-Siyong Alex Gong and Ci-Tong Hong and Kai-Wen Yao and Muh-Tian Shiue},
  year = {2008},
  doi = {10.1109/APCCAS.2008.4746127},
  url = {http://dx.doi.org/10.1109/APCCAS.2008.4746127},
  researchr = {https://researchr.org/publication/GongHYS08},
  cites = {0},
  citedby = {0},
  pages = {729-732},
  booktitle = {IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008},
  publisher = {IEEE},
}