Marcel Gort, Jason Helge Anderson. Design re-use for compile time reduction in FPGA high-level synthesis flows. In Jialin Chen, Wenbo Yin, Yuichiro Shibata, Lingli Wang, Hayden Kwok-Hay So, Yuchun Ma, editors, 2014 International Conference on Field-Programmable Technology, FPT 2014, Shanghai, China, December 10-12, 2014. pages 4-11, IEEE, 2014. [doi]
@inproceedings{GortA14,
title = {Design re-use for compile time reduction in FPGA high-level synthesis flows},
author = {Marcel Gort and Jason Helge Anderson},
year = {2014},
doi = {10.1109/FPT.2014.7082746},
url = {http://dx.doi.org/10.1109/FPT.2014.7082746},
researchr = {https://researchr.org/publication/GortA14},
cites = {0},
citedby = {0},
pages = {4-11},
booktitle = {2014 International Conference on Field-Programmable Technology, FPT 2014, Shanghai, China, December 10-12, 2014},
editor = {Jialin Chen and Wenbo Yin and Yuichiro Shibata and Lingli Wang and Hayden Kwok-Hay So and Yuchun Ma},
publisher = {IEEE},
isbn = {978-1-4799-6245-7},
}