Power-performance co-optimization of throughput core architecture using resistive memory - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Nilanjan Goswami, Bingyi Cao, Tao Li. Power-performance co-optimization of throughput core architecture using resistive memory. In 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013. pages 342-353, IEEE Computer Society, 2013. [doi]

This author has not been identified. Look up 'Nilanjan Goswami' in GoogleThis author has not been identified. Look up 'Bingyi Cao' in GoogleThis author has not been identified. Look up 'Tao Li' in Google

runs on WebDSL