Power-performance co-optimization of throughput core architecture using resistive memory

Nilanjan Goswami, Bingyi Cao, Tao Li. Power-performance co-optimization of throughput core architecture using resistive memory. In 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013. pages 342-353, IEEE Computer Society, 2013. [doi]

Abstract

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