Nilanjan Goswami, Bingyi Cao, Tao Li. Power-performance co-optimization of throughput core architecture using resistive memory. In 19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013. pages 342-353, IEEE Computer Society, 2013. [doi]
@inproceedings{GoswamiCL13,
title = {Power-performance co-optimization of throughput core architecture using resistive memory},
author = {Nilanjan Goswami and Bingyi Cao and Tao Li},
year = {2013},
doi = {10.1109/HPCA.2013.6522331},
url = {http://doi.ieeecomputersociety.org/10.1109/HPCA.2013.6522331},
researchr = {https://researchr.org/publication/GoswamiCL13},
cites = {0},
citedby = {0},
pages = {342-353},
booktitle = {19th IEEE International Symposium on High Performance Computer Architecture, HPCA 2013, Shenzhen, China, February 23-27, 2013},
publisher = {IEEE Computer Society},
isbn = {978-1-4673-5585-8},
}