CheckSyC: an efficient property checker for RTL SystemC designs

Daniel Große, Rolf Drechsler. CheckSyC: an efficient property checker for RTL SystemC designs. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 4167-4170, IEEE, 2005. [doi]

Abstract

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