An Improved FPGAs-Based Loop Pipeline Scheduling Algorithm for Reconfigurable Compiler

Zhenhua Guo, Yanxia Wu, Guoyin Zhang, Tianxiang Sui. An Improved FPGAs-Based Loop Pipeline Scheduling Algorithm for Reconfigurable Compiler. In Chenggang Wu, Albert Cohen, editors, Advanced Parallel Processing Technologies - 10th International Symposium, APPT 2013, Stockholm, Sweden, August 27-28, 2013, Revised Selected Papers. Volume 8299 of Lecture Notes in Computer Science, pages 307-318, Springer, 2013. [doi]

Abstract

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