Kyuseung Han, Jae-Jin Lee, Woojoo Lee, Jinho Lee. A Diagnosable Network-on-Chip for FPGA Verification of Intellectual Properties. IEEE Design & Test of Computers, 36(2):81-87, 2019. [doi]
@article{HanLLL19,
title = {A Diagnosable Network-on-Chip for FPGA Verification of Intellectual Properties},
author = {Kyuseung Han and Jae-Jin Lee and Woojoo Lee and Jinho Lee},
year = {2019},
doi = {10.1109/MDAT.2018.2890238},
url = {https://doi.org/10.1109/MDAT.2018.2890238},
researchr = {https://researchr.org/publication/HanLLL19},
cites = {0},
citedby = {0},
journal = {IEEE Design & Test of Computers},
volume = {36},
number = {2},
pages = {81-87},
}