Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs

B. P. Harish, Navakanta Bhat, Mahesh B. Patil. Process Variability-Aware Statistical Hybrid Modeling of Dynamic Power Dissipation in 65 nm CMOS Designs. In 2007 International Conference on Computing: Theory and Applications (ICCTA 2007), 5-7 March 2007, Kolkata, India. pages 94-98, IEEE Computer Society, 2007. [doi]

Authors

B. P. Harish

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Navakanta Bhat

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Mahesh B. Patil

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