Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee. A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm. IEEE Trans. on Circuits and Systems, 65-I(1):130-140, 2018. [doi]
@article{HataiCB18, title = {A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm}, author = {Indranil Hatai and Indrajit Chakrabarti and Swapna Banerjee}, year = {2018}, doi = {10.1109/TCSI.2017.2719053}, url = {https://doi.org/10.1109/TCSI.2017.2719053}, researchr = {https://researchr.org/publication/HataiCB18}, cites = {0}, citedby = {0}, journal = {IEEE Trans. on Circuits and Systems}, volume = {65-I}, number = {1}, pages = {130-140}, }