Kazumi Hatayama, Michinobu Nakao, Yasuo Sato. At-Speed Built-in Test for Logic Circuits with Multiple Clocks. In 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA. pages 292-297, IEEE Computer Society, 2002. [doi]
@inproceedings{HatayamaNS02,
title = {At-Speed Built-in Test for Logic Circuits with Multiple Clocks},
author = {Kazumi Hatayama and Michinobu Nakao and Yasuo Sato},
year = {2002},
url = {http://csdl.computer.org/comp/proceedings/ats/2002/1825/00/18250292abs.htm},
tags = {testing, logic},
researchr = {https://researchr.org/publication/HatayamaNS02},
cites = {0},
citedby = {0},
pages = {292-297},
booktitle = {11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-1825-7},
}