The following publications are possibly variants of this publication:
- Temperature-aware writing architecture for multilevel memristive cellsAmadeo de Gracia Herranz, Marisa López-Vallejo. patmos 2019: 57-62 [doi]
- Time to Digital Sensing for Multilevel RRAM CellsAmadeo de Gracia Herranz, Marisa López-Vallejo. access, 9:160216-160223, 2021. [doi]
- Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature RangesFernando Garcia-Redondo, Pablo Royer, Marisa López-Vallejo, Hernan Aparicio, Pablo Ituero, Carlos A. López-Barrio. tvlsi, 25(4):1224-1235, 2017. [doi]