Design issues in low-voltage high-speed current-mode logic buffers

Payam Heydari. Design issues in low-voltage high-speed current-mode logic buffers. In Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003. pages 21-26, ACM, 2003. [doi]

@inproceedings{Heydari03:0,
  title = {Design issues in low-voltage high-speed current-mode logic buffers},
  author = {Payam Heydari},
  year = {2003},
  doi = {10.1145/764808.764815},
  url = {http://doi.acm.org/10.1145/764808.764815},
  tags = {logic, design},
  researchr = {https://researchr.org/publication/Heydari03%3A0},
  cites = {0},
  citedby = {0},
  pages = {21-26},
  booktitle = {Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, Washington, DC, USA, April 28-29, 2003},
  publisher = {ACM},
  isbn = {1-58113-677-3},
}