A 2-clock-cycle Naïve Bayes classifier for dynamic branch prediction in pipelined RISC microprocessors - researchr publication

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Itaru Hida, Masayuki Ikebe, Tetsuya Asai, Masato Motomura. A 2-clock-cycle Naïve Bayes classifier for dynamic branch prediction in pipelined RISC microprocessors. In 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, South Korea, October 25-28, 2016. pages 297-300, IEEE, 2016. [doi]

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