Yoshinobu Higami, Hiroshi Takahashi, Shin-ya Kobayashi, Kewal K. Saluja. Diagnosis of Gate Delay Faults in the Presence of Clock Delay Faults. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014. pages 320-325, IEEE, 2014. [doi]
@inproceedings{HigamiTKS14,
title = {Diagnosis of Gate Delay Faults in the Presence of Clock Delay Faults},
author = {Yoshinobu Higami and Hiroshi Takahashi and Shin-ya Kobayashi and Kewal K. Saluja},
year = {2014},
doi = {10.1109/ISVLSI.2014.60},
url = {http://dx.doi.org/10.1109/ISVLSI.2014.60},
researchr = {https://researchr.org/publication/HigamiTKS14},
cites = {0},
citedby = {0},
pages = {320-325},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014},
publisher = {IEEE},
}