Yoshinobu Higami, Hiroshi Takahashi, Shin-ya Kobayashi, Kewal K. Saluja. Diagnosis of Gate Delay Faults in the Presence of Clock Delay Faults. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2014, Tampa, FL, USA, July 9-11, 2014. pages 320-325, IEEE, 2014. [doi]
Abstract is missing.