Weng-Geng Ho, Nan Liu, Kyaw Zwa Lwin Ne, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang. High performance low overhead template-based Cell-Interleave Pipeline (TCIP) for asynchronous-logic QDI circuits. In IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montréal, QC, Canada, May 22-25, 2016. pages 1762-1765, IEEE, 2016. [doi]
Abstract is missing.