Zheng-Hao Hong, Wei-Zen Chen. A 3.12 pJ/bit, 19-27 Gbps receiver with 2 Tap-DFE embedded clock and data recovery. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, KaoHsiung, Taiwan, November 10-12, 2014. pages 277-280, IEEE, 2014. [doi]
Abstract is missing.