Automated Method to Generate Bitstream Intellectual Property Cores for Virtex FPGAs

Edson L. Horta, John W. Lockwood. Automated Method to Generate Bitstream Intellectual Property Cores for Virtex FPGAs. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 975-979, Springer, 2004. [doi]

Abstract

Abstract is missing.