Xianwu Hu, Yu Wang, Zizhao Ma, Gan Wen, Zeming Wang, Zhichao Lu, Yunlong Liu, Yanlei Li, Xingdong Liang, Xiaoyang Zeng, Yufeng Xie. An 8.8 TFLOPS/W Floating-Point RRAM-Based Compute-in-Memory Macro Using Low Latency Triangle-Style Mantissa Multiplication. IEEE Trans. Circuits Syst. II Express Briefs, 70(11):4216-4220, November 2023. [doi]
Abstract is missing.