Using Clock-Vdd to Test and Diagnose the Power-Switch in Power-Gating Circuit

Hsiang-Hui Huang, Ching-Hwa Cheng. Using Clock-Vdd to Test and Diagnose the Power-Switch in Power-Gating Circuit. In 25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA. pages 110-118, IEEE Computer Society, 2007. [doi]

@inproceedings{HuangC07:16,
  title = {Using Clock-Vdd to Test and Diagnose the Power-Switch in Power-Gating Circuit},
  author = {Hsiang-Hui Huang and Ching-Hwa Cheng},
  year = {2007},
  doi = {10.1109/VTS.2007.85},
  url = {http://dx.doi.org/10.1109/VTS.2007.85},
  tags = {testing},
  researchr = {https://researchr.org/publication/HuangC07%3A16},
  cites = {0},
  citedby = {0},
  pages = {110-118},
  booktitle = {25th IEEE VLSI Test Symposium (VTS 2007), 6-10 May 2007, Berkeley, California, USA},
  publisher = {IEEE Computer Society},
}