Shih-Hsu Huang, Chun-Hua Cheng, Chia-Ming Chang, Yow-Tyng Nieh. Clock Period Minimization with Minimum Delay Insertion. In Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007. pages 970-975, IEEE, 2007. [doi]
Abstract is missing.