A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element Switching

Chengyu Huang, Yushen Fu, Zekun Yang, Yang Liu, Nan Sun, Xueqing Li, Huazhong Yang. A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element Switching. In 47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021. pages 495-498, IEEE, 2021. [doi]

@inproceedings{HuangFYLSLY21,
  title = {A 16-Bit 4.0-GS/s Calibration-Free 65nm DAC with >70dBc SFDR and <-80dBc IM3 up to 1GHz Using Constant-Activity Element Switching},
  author = {Chengyu Huang and Yushen Fu and Zekun Yang and Yang Liu and Nan Sun and Xueqing Li and Huazhong Yang},
  year = {2021},
  doi = {10.1109/ESSCIRC53450.2021.9567883},
  url = {https://doi.org/10.1109/ESSCIRC53450.2021.9567883},
  researchr = {https://researchr.org/publication/HuangFYLSLY21},
  cites = {0},
  citedby = {0},
  pages = {495-498},
  booktitle = {47th ESSCIRC 2021 - European Solid State Circuits Conference, ESSCIR 2021, Grenoble, France, September 13-22, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-3751-6},
}