The following publications are possibly variants of this publication:
- A 16-Bit 4.0-GS/s Calibration-Free 65 nm DAC Achieving >70 dBc SFDR and < -80 dBc IM3 Up to 1 GHz With Enhanced Constant-Switching-Activity Data-Weighted-AveragingYushen Fu, Chengyu Huang, Longqiang Lai, Nan Sun, Xueqing Li, Huazhong Yang. tcasI, 70(5):1856-1867, May 2023. [doi]
- A 12b 2.9GS/s DAC with IM3 ≪-60dBc beyond 1GHz in 65nm CMOSChi-Hung Lin, Frank M. L. van der Goes, Jan J. Westra, Jan Mulder, Yu Lin, Erol Arslan, Emre Ayranci, Xiaodong Liu, Klaas Bult. isscc 2009: 74-75 [doi]
- A 177mW 10GS/s NRZ DAC with Switching-Glitch Compensation Achieving > 64dBc SFDR and < -77dBc IM3Hung-Yi Huang, Xin-Yu Chen, Tai-Haur Kuo. vlsic 2020: 1-2 [doi]
- A 14-bit 1.0-GS/s dynamic element matching DAC with >80 dB SFDR up to the NyquistJianan Liu, Xueqing Li, Qi Wei, Huazhong Yang. iscas 2015: 1026-1029 [doi]
- A 14-Bit 3-GS/s DAC Achieving SFDR >63dB Up to 1.4GHz With Random Differential-Quad Switching TechniqueFengjie Wang, Zhiyu Wang, Jiarui Liu, Faxin Yu. tcasII, 69(3):879-883, 2022. [doi]