A methodology for FPGA to structured-ASIC synthesis and verification - researchr publication authors

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Michael Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo. A methodology for FPGA to structured-ASIC synthesis and verification. In Georges G. E. Gielen, editor, Proceedings of the Conference on Design, Automation and Test in Europe: Designers Forum, DATE 2006, Munich, Germany, March 6-10, 2006. pages 64-69, European Design and Automation Association, Leuven, Belgium, 2006. [doi]

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