Jay Schleicher - researchr alias

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Viewing Publication 1 - 7 from 7

2007

Equivalence Verification of FPGA and Structured ASIC ImplementationsJoachim Pistorius, Mike Hutton, Jay Schleicher, Mihail Iotov, Enoch Julias, Kumara Tharmalingam. fpl 2007: 423-428 [doi]

2006

A methodology for FPGA to structured-ASIC synthesis and verificationMichael Hutton, Richard Yuan, Jay Schleicher, Gregg Baeckler, Sammy Cheung, Kar Keng Chua, Hee Kong Phoo. date 2006: 64-69 [doi]

2005

2004

Improving FPGA Performance and Area Using an Adaptive Logic ModuleMichael Hutton, Jay Schleicher, David M. Lewis, Bruce Pedersen, Richard Yuan, Sinan Kaptanoglu, Gregg Baeckler, Boris Ratchev, Ketan Padalia, Mark Bourgeault, Andy Lee, Henry Kim, Rahul Saini. fpl 2004: 135-144 [doi]

2002

Interconnect enhancements for a high-speed PLD architectureMichael Hutton, Vinson Chan, Peter Kazarian, Victor Maruri, Tony Ngai, Jim Park, Rakesh Patel, Bruce Pedersen, Jay Schleicher, Sergey Shumarayev. fpga 2002: 3-10 [doi]

1999

A next generation architecture optimized for high density system level integrationRichard Cliff, Srinivas Reddy, Cameron McClintock, David Jefferslon, Christopher Lane, Ketan Zaveri, Manuel Mejia, Andy Lee, Ninh Ngo, Risa Altaf, Bruce Pedersen, Frank Heile, Jay Schleicher, John Turner. cicc 1999: 175-178 [doi]

1998

Optimizations for a Highly Cost-Efficient Programmable Logic ArchitectureKerry Veenstra, Bruce Pedersen, Jay Schleicher, Chiakang Sung. fpga 1998: 20-24 [doi]

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