A fast transistor-chaining algorithm for CMOS cell layout

Chi-Yi Hwang, Yung-Chin Hsieh, Youn-Long Lin, Yu-Chin Hsu. A fast transistor-chaining algorithm for CMOS cell layout. IEEE Trans. on CAD of Integrated Circuits and Systems, 9(7):781-786, 1990. [doi]

Authors

Chi-Yi Hwang

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Yung-Chin Hsieh

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Youn-Long Lin

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Yu-Chin Hsu

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