A fast transistor-chaining algorithm for CMOS cell layout

Chi-Yi Hwang, Yung-Chin Hsieh, Youn-Long Lin, Yu-Chin Hsu. A fast transistor-chaining algorithm for CMOS cell layout. IEEE Trans. on CAD of Integrated Circuits and Systems, 9(7):781-786, 1990. [doi]

Abstract

Abstract is missing.