Table of Contents

• Exploring Instruction-Fetch Bandwidth Requirement in Wide-Issue Superscalar ProcessorsPierre Michaud, André Seznec, Stéphan Jourdan. 2-10 [doi]
• MPEG-2 Video Decompression on Simultaneous Multithreaded Multimedia ProcessorsHeiko Oehring, Ulrich Sigmund, Theo Ungerer. 11-16 [doi]
• A Fully Asynchronous Superscalar ArchitectureD. K. Arvind, Robert D. Mullins. 17-22 [doi]
• The Need for Fast Communication in Hardware-Based Speculative Chip MultiprocessorsVenkata Krishnan, Josep Torrellas. 24-33 [doi]
• A Multithreaded Java Microcontroller for Thread-Oriented Real-Time Event HandlingUwe Brinkschulte, C. Krakowski, Jochen Kreuzinger, Theo Ungerer. 34-39 [doi]
• On Dynamic Speculative Thread Partitioning and the MEM-Slicing AlgorithmLucian Codrescu, D. Scott Wills. 40-46 [doi]
• Branch Prediction Using Selective Branch InversionSrilatha Manne, Artur Klauser, Dirk Grunwald. 48-56 [doi]
• Control-Flow Speculation through Value Prediction for Superscalar ProcessorsJosé González, Antonio González. 57-65 [doi]
• Exploring Last n Value PredictionMartin Burtscher, Benjamin G. Zorn. 66-76 [doi]
• Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue ProcessorsMadhavi Gopal Valluri, R. Govindarajan. 78-83 [doi]
• Containers on the Parallelization of General-Purpose Java ProgramsPeng Wu, David A. Padua. 84-90 [doi]
• The Modulo Interval: A Simple and Practical Representation for Program AnalysisTsuneo Nakanishi, Kazuki Joe, Constantine D. Polychronopoulos, Akira Fukuda. 91-96 [doi]
• Memory System Support for Image ProcessingLixin Zhang, John B. Carter, Wilson C. Hsieh, Sally A. McKee. 98-107 [doi]
• Performance Characteristics of a Network of Commodity Multiprocessors for the NAS Benchmarks Using a Hybrid Memory ModelFranck Cappello, Olivier Richard. 108-116 [doi]
• Quantifying the Benefits of SPECint Distant Parallelism in Simultaneous Multi-Threading ArchitecturesDaniel Ortega, Ivan Martel, Venkata Krishnan, Eduard Ayguadé, Mateo Valero. 117-124 [doi]
• High-End Computing Technology: Where is it Heading?Greg Astfalk. 126 [doi]
• LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register AllocationByung-Sun Yang, Soo-Mook Moon, Seongbae Park, Junpyo Lee, SeungIl Lee, Jinpyo Park, Yoo C. Chung, Suhyun Kim, Kemal Ebcioglu, Erik R. Altman. 128-138 [doi]
• Automatic Parallelization of Recursive ProceduresManish Gupta, Sayak Mukhopadhyay, Navin Sinha. 139-148 [doi]
• On the Complexity of Loop FusionAlain Darte. 149-157 [doi]
• A Cost-Effective Clustered ArchitectureRamon Canal, Joan-Manuel Parcerisa, Antonio González. 160-168 [doi]
• Optimizing Data Locality for SCI-Based PC-Clusters with the SmiLE Monitoring ApproachWolfgang Karl, Markus Leberecht, Martin Schulz. 169-176 [doi]
• Dynamic Linking on a Shared-Memory MultiprocessorBowen Alpern, Mark Charney, Jong-Deok Choi, Anthony Cocchi, Derek Lieber. 177-182 [doi]
• Reducing Cache Conflicts by Partitioning and Privatizing Shared ArraysZhiyuan Li. 183-190 [doi]
• Localizing Non-Affine Array ReferencesNicholas Mitchell, Larry Carter, Jeanne Ferrante. 192-202 [doi]
• On Reducing False Sharing while Improving Locality on Shared Memory MultiprocessorsMahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee. 203-211 [doi]
• Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication DelaySatoshi Fujita, Tadanori Nakagawa. 212-220 [doi]
• Automatic Analytical Modeling for the Estimation of Cache MissesBasilio B. Fraguela, Ramon Doallo, Emilio L. Zapata. 221-231 [doi]
• Cameron: High level Language Compilation for Reconfigurable SystemsJeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper, J. Ross Beveridge. 236-244 [doi]
• Predicated Static Single AssignmentLori Carter, Beth Simon, Brad Calder, Larry Carter, Jeanne Ferrante. 245-255 [doi]
• The Effect of Program Optimization on Trace Cache EfficiencyDerek L. Howard, Mikko H. Lipasti. 256-261 [doi]
• Data Dependence Testing in PracticeKleanthis Psarris, Konstantinos Kyriakopoulos. 264-273 [doi]
• On Index Set SplittingMartin Griebl, Paul Feautrier, Christian Lengauer. 274-282 [doi]
• Efficient Parallelization Using Combined Loop and Data TransformationsMichael F. P. O Boyle, Peter M. W. Knijnenburg. 283-292 [doi]
• Caching and Predicting Branch Sequences for Improved Fetch EffectivenessSoner Önder, Jun Xu, Rajiv Gupta. 294-302 [doi]
• In Search of Speculative Thread-Level ParallelismJeffrey T. Oplinger, David L. Heine, Monica S. Lam. 303-313 [doi]
• Looking at History to Filter Allocations in Prediction TablesEnric Morancho, José M. Llabería, Àngel Olivé. 314-319 [doi]