On Acceleration of Logic Circuits Optimization Using Implication Relations

Hideyuki Ichihara, Kozo Kinoshita. On Acceleration of Logic Circuits Optimization Using Implication Relations. In 6th Asian Test Symposium (ATS 97), 17-18 November 1997, Akita, Japan. pages 222-227, IEEE Computer Society, 1997. [doi]

Abstract

Abstract is missing.