3) architecture for a burst operated 1.5V MRAM macro

Tsuneo Inaba, Kenji Tsuchida, Tadahiko Sugibayashi, Shuichi Tahara, Hiroaki Yoda. 3) architecture for a burst operated 1.5V MRAM macro. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 399-402, IEEE, 2003. [doi]

@inproceedings{InabaTSTY03,
  title = {3) architecture for a burst operated 1.5V MRAM macro},
  author = {Tsuneo Inaba and Kenji Tsuchida and Tadahiko Sugibayashi and Shuichi Tahara and Hiroaki Yoda},
  year = {2003},
  doi = {10.1109/CICC.2003.1249427},
  url = {https://doi.org/10.1109/CICC.2003.1249427},
  researchr = {https://researchr.org/publication/InabaTSTY03},
  cites = {0},
  citedby = {0},
  pages = {399-402},
  booktitle = {Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003},
  publisher = {IEEE},
  isbn = {0-7803-7842-3},
}