Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond

Koichiro Ishibashi, Tetsuya Fujimoto, Takahiro Yamashita, Hiroyuki Okada, Yukio Arima, Yasuyuki Hashimoto, Kohji Sakata, Isao Minematsu, Yasuo Itoh, Haruki Toda, Motoi Ichihashi, Yoshihide Komatsu, Masato Hagiwara, Toshiro Tsukada. Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. IEICE Transactions, 89-C(3):250-262, 2006. [doi]

@article{IshibashiFYOAHSMITIKHT06,
  title = {Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond},
  author = {Koichiro Ishibashi and Tetsuya Fujimoto and Takahiro Yamashita and Hiroyuki Okada and Yukio Arima and Yasuyuki Hashimoto and Kohji Sakata and Isao Minematsu and Yasuo Itoh and Haruki Toda and Motoi Ichihashi and Yoshihide Komatsu and Masato Hagiwara and Toshiro Tsukada},
  year = {2006},
  doi = {10.1093/ietele/e89-c.3.250},
  url = {http://dx.doi.org/10.1093/ietele/e89-c.3.250},
  tags = {logic},
  researchr = {https://researchr.org/publication/IshibashiFYOAHSMITIKHT06},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {89-C},
  number = {3},
  pages = {250-262},
}