A 35 ns cycle time 3.3 V only 32 Mb NAND flash EEPROM

Yoshihisa Iwata, Ken-ichi Imamiya, Yoshihisa Sugiura, Hiroshi Nakamura, Hideko Oodaira, Masaki Momodomi, Yasuo Itoh, Toshiharu Watanabe, Hitoshi Araki, Kazuhito Narita, Kazunori Masuda, Junichi Miyamoto. A 35 ns cycle time 3.3 V only 32 Mb NAND flash EEPROM. J. Solid-State Circuits, 30(11):1157-1164, November 1995. [doi]

@article{IwataISNOMIWANMM95,
  title = {A 35 ns cycle time 3.3 V only 32 Mb NAND flash EEPROM},
  author = {Yoshihisa Iwata and Ken-ichi Imamiya and Yoshihisa Sugiura and Hiroshi Nakamura and Hideko Oodaira and Masaki Momodomi and Yasuo Itoh and Toshiharu Watanabe and Hitoshi Araki and Kazuhito Narita and Kazunori Masuda and Junichi Miyamoto},
  year = {1995},
  month = {November},
  doi = {10.1109/4.475702},
  url = {https://doi.org/10.1109/4.475702},
  researchr = {https://researchr.org/publication/IwataISNOMIWANMM95},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {30},
  number = {11},
  pages = {1157-1164},
}