The following publications are possibly variants of this publication:
- Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL VerilogHimanshu Jain, Daniel Kroening, Natasha Sharygina, Edmund M. Clarke. tcad, 27(2):366-379, 2008. [doi]
- Interactive presentation: Image computation and predicate refinement for RTL verilog using word level proofsDaniel Kroening, Natasha Sharygina. date 2007: 1325-1330 [doi]
- VCEGAR: Verilog CounterExample Guided Abstraction RefinementHimanshu Jain, Daniel Kroening, Natasha Sharygina, Edmund M. Clarke. TACAS 2007: 583-586 [doi]
- Using Statically Computed Invariants Inside the Predicate Abstraction and Refinement LoopHimanshu Jain, Franjo Ivancic, Aarti Gupta, Ilya Shlyakhter, Chao Wang. cav 2006: 137-151 [doi]
- Verification of SpecC using predicate abstractionHimanshu Jain, Daniel Kroening, Edmund M. Clarke. memocode 2004: 7-16 [doi]
- Verification of SpecC using predicate abstractionEdmund M. Clarke, Himanshu Jain, Daniel Kroening. fmsd, 30(1):5-28, 2007. [doi]