Jakub Janicki, Jerzy Tyszer, Grzegorz Mrugalski, Janusz Rajski. Bandwidth-aware test compression logic for SoC designs. In 17th IEEE European Test Symposium, ETS 2012, May 28th - June 1st 2012, Annecy, France. pages 1-6, IEEE Computer Society, 2012. [doi]
Abstract is missing.