Ireneusz Janiszewski, Hermann Meuth, Bernhard Hoppe. FPGA-Efficient Hybrid LUT/CORDIC Architecture. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 933-937, Springer, 2004. [doi]
@inproceedings{JaniszewskiMH04,
title = {FPGA-Efficient Hybrid LUT/CORDIC Architecture},
author = {Ireneusz Janiszewski and Hermann Meuth and Bernhard Hoppe},
year = {2004},
url = {http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=3203&spage=933},
tags = {architecture},
researchr = {https://researchr.org/publication/JaniszewskiMH04},
cites = {0},
citedby = {0},
pages = {933-937},
booktitle = {Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
editor = {Jürgen Becker and Marco Platzner and Serge Vernalde},
volume = {3203},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-22989-2},
}