Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain

Guillermo A. Jaquenod, Javier Valls, Javier Siman. Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain. Int. J. Reconfig. Comp., 2014, 2014. [doi]

Authors

Guillermo A. Jaquenod

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Javier Valls

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Javier Siman

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