Guillermo A. Jaquenod, Javier Valls, Javier Siman. Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain. Int. J. Reconfig. Comp., 2014, 2014. [doi]
@article{JaquenodVS14,
title = {Efficient FPGA Hardware Reuse in a Multiplierless Decimation Chain},
author = {Guillermo A. Jaquenod and Javier Valls and Javier Siman},
year = {2014},
doi = {10.1155/2014/546264},
url = {http://dx.doi.org/10.1155/2014/546264},
researchr = {https://researchr.org/publication/JaquenodVS14},
cites = {0},
citedby = {0},
journal = {Int. J. Reconfig. Comp.},
volume = {2014},
}