Error tolerance in parallel simulated annealing techniques

Rajeev Jayaraman, Frederica Darema. Error tolerance in parallel simulated annealing techniques. In Computer Design: VLSI in Computers and Processors, ICCD 1988., Proceedings of the 1988 IEEE International Conference on, Rye Brook, NY, USA, October 3-5, 1988. pages 545-548, IEEE, 1988. [doi]

Abstract

Abstract is missing.