Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits

Jochen A. G. Jess. Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits. In Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002. pages 387, IEEE Computer Society, 2002. [doi]

@inproceedings{Jess02,
  title = {Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits},
  author = {Jochen A. G. Jess},
  year = {2002},
  url = {https://dl.acm.org/doi/10.5555/827246.827367},
  researchr = {https://researchr.org/publication/Jess02},
  cites = {0},
  citedby = {0},
  pages = {387},
  booktitle = {Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1807-9},
}