Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits

Jochen A. G. Jess. Parametric Yield Estimation for Deep Sub- Micron VLSI Circuits. In Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2002, Porto Alegre, Brazil, September 9-14, 2002. pages 387, IEEE Computer Society, 2002. [doi]

Abstract

Abstract is missing.