Designing soft-error-aware circuits with power and speed optimization - researchr publication authors

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H. Jiang, H. Zhang, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva. Designing soft-error-aware circuits with power and speed optimization. In IEEE International Reliability Physics Symposium, IRPS 2018, Burlingame, CA, USA, March 11-15, 2018. pages 5-1, IEEE, 2018. [doi]

This author has not been identified. Look up 'H. Jiang' in GoogleThis author has not been identified. It may be one of the following persons:

Hongyu Zhang

Look up 'H. Zhang' in GoogleThis author has not been identified. Look up 'Balaji Narasimham' in GoogleThis author has not been identified. Look up 'Lloyd W. Massengill' in GoogleThis author has not been identified. Look up 'Bharat L. Bhuva' in Google

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