Naifeng Jing, Yao Shen, Yao Lu, Shrikanth Ganapathy, Zhigang Mao, Minyi Guo, Ramon Canal, Xiaoyao Liang. An energy-efficient and scalable eDRAM-based register file architecture for GPGPU. In Avi Mendelson, editor, The 40th Annual International Symposium on Computer Architecture, ISCA'13, Tel-Aviv, Israel, June 23-27, 2013. pages 344-355, ACM, 2013. [doi]
Abstract is missing.