Statistical Timing Optimization of Combinatorial Logic Circuits

Horng-Fei Jyu, Sharad Malik. Statistical Timing Optimization of Combinatorial Logic Circuits. In ICCD. pages 77-80, 1993.

@inproceedings{JyuM93,
  title = {Statistical Timing Optimization of Combinatorial Logic Circuits},
  author = {Horng-Fei Jyu and Sharad Malik},
  year = {1993},
  tags = {optimization, logic},
  researchr = {https://researchr.org/publication/JyuM93},
  cites = {0},
  citedby = {0},
  pages = {77-80},
  booktitle = {ICCD},
}